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EUROPAR
2007
Springer
15 years 11 months ago
Hardware Transactional Memory with Operating System Support, HTMOS
Abstract. Hardware Transactional Memory (HTM) gives software developers the opportunity to write parallel programs more easily compared to any previous programming method, and yiel...
Sasa Tomic, Adrián Cristal, Osman S. Unsal,...
HPCA
2006
IEEE
16 years 5 months ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
HPCA
2001
IEEE
16 years 5 months ago
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design
In this papel; we address the severe performance gap caused by high processor clock rates and slow DRAM accesses. We show that even with an aggressive, next-generation memory syst...
Wei-Fen Lin, Steven K. Reinhardt, Doug Burger
CLUSTER
2006
IEEE
15 years 11 months ago
A Virtual Registry For Wide-Area Messaging
Tycho is a reference implementation of a combined extensible wide-area messaging framework with a built in distributed registry for publishing and discovering remote endpoints. Th...
Mark Baker, Matthew Grove
CCGRID
2005
IEEE
15 years 10 months ago
OGSA-based grid workload monitoring
In heterogeneous and dynamic distributed systems like the Grid, detailed monitoring of workload and its resulting system performance (e.g. response time) is required to facilitate...
Rui Zhang, Steve Moyle, Steve McKeever, Stephen He...