2155 search results - page 350 / 431 » The EM-X Parallel Computer: Architecture and Basic Performan... |
135
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ICES
2005
Springer
15 years 10 months ago
2005
Springer
Abstract. There have been introduced a number of systems with evolvable hardware on a single chip. To overcome the lack of flexibility in these systems, we propose a single-chip e...
121
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EUROPAR
2001
Springer
15 years 9 months ago
2001
Springer
A swap instruction, which exchanges a value in memory with a value of a register, is available on many architectures. The primary application of a swap instruction has been for pro...
128
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HPCA
2008
IEEE
16 years 5 months ago
2008
IEEE
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
179
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HPCA
2005
IEEE
16 years 5 months ago
2005
IEEE
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
181
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EUROPAR
2009
Springer
15 years 11 months ago
2009
Springer
Massively Multiplayer Online Games (MMOGs) currently entertain millions of players daily. To keep these players online and generate revenue, MMOGs are currently relying on manually...