2155 search results - page 42 / 431 » The EM-X Parallel Computer: Architecture and Basic Performan... |
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HPCA
2005
IEEE
15 years 7 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
137
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ICDCS
2002
IEEE
15 years 7 months ago
2002
IEEE
Attainment of software performance assurances in open, largely unpredictable environments has recently become an important focus for real-time research. Unlike closed embedded sys...
140
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CODES
2003
IEEE
15 years 7 months ago
2003
IEEE
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
114
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PREMI
2005
Springer
15 years 7 months ago
2005
Springer
In this paper we present and analyze an artificial neural network hardware engine, its architecture and implementation. The engine was designed to solve performance problems of the...
IPPS
2003
IEEE
15 years 7 months ago
2003
IEEE
In this paper, we overview general hardware architecture and a programming model of SRC-6ETM reconfigurable computers, and compare the performance of the SRC-6E machine vs. IntelÂ...