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IPPS
1998
IEEE
15 years 8 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
EGC
2005
Springer
15 years 10 months ago
Security Architecture for Open Collaborative Environment
Abstract. The paper presents proposed Security Architecture for Open Collaborative Environment (OCE) being developed in the framework of the Collaboratory.nl (CNL) project with the...
Yuri Demchenko, Leon Gommans, Cees de Laat, Bas va...
EDO
2000
Springer
15 years 8 months ago
Architectural Reflection: Realising Software Architectures via Reflective Activities
Architectural reflection is the computation performed by a software system about its own software architecture. Building on previous research and on practical experience in industr...
Francesco Tisato, Andrea Savigni, Walter Cazzola, ...
MICRO
2003
IEEE
116views Hardware» more  MICRO 2003»
15 years 9 months ago
Universal Mechanisms for Data-Parallel Architectures
Data-parallel programs are both growing in importance and increasing in diversity, resulting in specialized processors targeted at specific classes of these programs. This paper ...
Karthikeyan Sankaralingam, Stephen W. Keckler, Wil...
VLSID
2002
IEEE
79views VLSI» more  VLSID 2002»
16 years 4 months ago
A Power Minimization Technique for Arithmetic Circuits by Cell Selection
As a basic cell of arithmetic circuits, a one-bit full adder and a counter are usually used. Minimizing power consumption of these components is a key issue for low-power circuit ...
Masanori Muroyama, Tohru Ishihara, Akihiko Hyodo, ...