2155 search results - page 98 / 431 » The EM-X Parallel Computer: Architecture and Basic Performan... |
156
Voted
MICRO
2010
IEEE
15 years 2 months ago
2010
IEEE
This paper presents ReMAP, a reconfigurable architecture geared towards accelerating and parallelizing applications within a heterogeneous CMP. In ReMAP, threads share a common rec...
206
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CCGRID
2008
IEEE
15 years 11 months ago
2008
IEEE
To be competitive, Enterprises are collecting and analyzing increasingly large amount of data in order to derive business insights. However, there are at least two challenges to m...
153
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PDP
2008
IEEE
15 years 11 months ago
2008
IEEE
This paper examines the scalable parallel implementation of QR factorization of a general matrix, targeting SMP and multi-core architectures. Two implementations of algorithms-by-...
115
Voted
ICIP
2005
IEEE
16 years 6 months ago
2005
IEEE
Many basic computations can be done by means of iterative neighborhood-based calculations, including threshold, optimum, distance transform, contour closing, mathematical morpholo...
147
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IPPS
2002
IEEE
15 years 9 months ago
2002
IEEE
This paper presents preliminary efforts to develop compilation and execution environments that achieve performance portability of multilevel parallelization on hierarchical archit...