245 search results - page 9 / 49 » The Effect of Buffering on the Performance of R-Trees |
ASPDAC
2004
ACM
15 years 2 months ago
2004
ACM
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance and signal integrity. Buffer insertion is one...
ICCD
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper presents the Finished Store Buffer (or FSB), an alternative and position-insensitive approach for building a scalable store buffer for an out-of-order processor. Exploi...
ICCAD
2001
IEEE
15 years 6 months ago
2001
IEEE
In deep submicron VLSI circuits, interconnect reliability due to electromigration and thermal effects is fast becoming a serious design issue particularly for long signal lines. T...
ASPDAC
2009
ACM
15 years 1 months ago
2009
ACM
Abstract-- The increasing wire delay constraints in deep submicron VLSI designs have led to the emergence of scalable and modular Network-on-Chip (NoC) architectures. As the power ...
TELSYS
2010
14 years 7 months ago
2010
In heterogeneous network environments, the network connections of a multi-homed device may have significant bandwidth differential. For a multihomed transmission protocol designed ...