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» The Effect of Compiler Optimizations on Pentium 4 Power Cons...
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ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
15 years 3 months ago
Hardware atomicity for reliable software speculation
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, ...
85
Voted
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 2 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
99
Voted
DATE
2010
IEEE
197views Hardware» more  DATE 2010»
14 years 4 months ago
Compilation of stream programs for multicore processors that incorporate scratchpad memories
The stream processing characteristics of many embedded system applications in multimedia and networking domains have led to the advent of stream based programming formats. Several ...
Weijia Che, Amrit Panda, Karam S. Chatha
CASES
2006
ACM
15 years 3 months ago
Methods for power optimization in distributed embedded systems with real-time requirements
Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have st...
Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochock...
105
Voted
PATMOS
2007
Springer
15 years 3 months ago
Soft Error-Aware Power Optimization Using Gate Sizing
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...