38 search results - page 6 / 8 » The Effect of Compiler Optimizations on Pentium 4 Power Cons... |
MICRO
2002
IEEE
15 years 2 months ago
2002
IEEE
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
82
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CODES
2009
IEEE
14 years 10 months ago
2009
IEEE
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
104
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IEEEPACT
2002
IEEE
15 years 2 months ago
2002
IEEE
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
113
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ICCD
2007
IEEE
15 years 1 months ago
2007
IEEE
In this paper we propose techniques to dynamically downsize or upsize a cache accompanied by cache set/line shutdown to produce efficient caches. Unlike previous approaches, resiz...
CASES
2006
ACM
15 years 3 months ago
2006
ACM
Embedded application requirements, including high performance, low power consumption and fast time to market, are uncommon in the broader domain of general purpose applications. I...