316 search results - page 2 / 64 » The Effect of Program Optimization on Trace Cache Efficiency |
IEEEPACT
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper presents a new technique for efficient usage of small trace caches. A trace cache can significantly increase the performance of wide out-oforder processors, but to be e...
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ICS
2010
Tsinghua U.
14 years 12 months ago
2010
Tsinghua U.
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
MICRO
2003
IEEE
15 years 2 months ago
2003
IEEE
A dynamic optimizer is a runtime software system that groups a program’s instruction sequences into traces, optimizes those traces, stores the optimized traces in a softwarebase...
HIPEAC
2009
Springer
15 years 1 months ago
2009
Springer
This paper proposes and studies a hardware-based adaptive controlled migration strategy for managing distributed L2 caches in chip multiprocessors. Building on an area-efficient sh...
DSD
2010
IEEE
14 years 9 months ago
2010
IEEE
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...