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DAC
2008
ACM
16 years 5 months ago
An 8x8 run-time reconfigurable FPGA embedded in a SoC
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
Sumanta Chaudhuri, Sylvain Guilley, Florent Flamen...
GLVLSI
2009
IEEE
158views VLSI» more  GLVLSI 2009»
15 years 8 months ago
Exploration of memory hierarchy configurations for efficient garbage collection on high-performance embedded systems
Modern embedded devices (e.g., PDAs, mobile phones) are now incorporating Java as a very popular implementation language in their designs. These new embedded systems include multi...
José Manuel Velasco, David Atienza, Katzali...
DATE
2006
IEEE
76views Hardware» more  DATE 2006»
15 years 10 months ago
Performance optimization for energy-aware adaptive checkpointing in embedded real-time systems
Using additional store-checkpoinsts (SCPs) and compare-checkpoints (CCPs), we present an adaptive checkpointing for double modular redundancy (DMR) in this paper. The proposed app...
Zhongwen Li, Hong Chen, Shui Yu
170
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ARCS
2010
Springer
15 years 8 months ago
A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems
Power and resource management are key goals for the success of modern battery-supplied multimedia devices. This kind of devices are usually based on SoCs with a wide range of subsy...
Patrick Bellasi, William Fornaciari, David Siorpae...
SAC
2003
ACM
15 years 10 months ago
TinyGALS: A Programming Model for Event-Driven Embedded Systems
Networked embedded systems such as wireless sensor networks are usually designed to be event-driven so that they are reactive and power efficient. Programming embedded systems wit...
Elaine Cheong, Judith Liebman, Jie Liu, Feng Zhao