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» The Energy Efficiency of IRAM Architectures
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119
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ISLPED
2010
ACM
153views Hardware» more  ISLPED 2010»
15 years 20 days ago
Leakage minimization using self sensing and thermal management
We have developed a system architecture, measuring and modeling techniques, and algorithms for on-line power and energy optimization and thermal management. The starting point for...
Alireza Vahdatpour, Miodrag Potkonjak
80
Voted
FPL
2007
Springer
100views Hardware» more  FPL 2007»
15 years 6 months ago
Clock-Aware Placement for FPGAs
The programmable clock networks in FPGAs have a significant impact on overall power, area, and delay. Not only does the clock network itself dissipate a significant amount of powe...
Julien Lamoureux, Steven J. E. Wilton
105
Voted
RSP
2003
IEEE
147views Control Systems» more  RSP 2003»
15 years 5 months ago
Cache Configuration Exploration on Prototyping Platforms
We describe cache architecture, intended for prototype-oriented IC platforms, that automatically finds the best cache configuration for a particular application. The cache itself ...
Chuanjun Zhang, Frank Vahid
SENSYS
2004
ACM
15 years 5 months ago
Power - time optimal algorithm for computing FFT over sensor networks
bstract: Power - Time Optimal Algorithm for Computing FFT over Sensor Networks Categories and Subject Descriptors C.2.1 [Network Architecture and Design] Wireless Communication, Di...
Turkmen Canli, Mark Terwilliger, Ajay K. Gupta, As...
120
Voted
TC
2010
14 years 10 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...