We developed a content delivery system using a partially reconfigurable FPGA to securely distribute digital content on the Internet. With partial reconfigurability of a Xilinx Vir...
Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Ke...
This paper presents the design of BORPH's file system layer for FPGA-based reconfigurable computers. BORPH provides user FPGA designs that execute as hardware processes acces...
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
This paper presents a method of constructing pre-routed FPGA cores which lays the foundations for a rapid system construction framework for dynamically reconfigurable computing sy...
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...