We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
-- This paper describes the operation of a field programmable gate array (FPGA), the basics of current mode logic, and examines the idea of creating a SiGe heterojunction bipolar (...
—Wireless sensor networks (WSNs) are typically composed of very small, battery-operated devices (sensor nodes) containing simple microprocessors with few computational resources....
Motion estimation is a complex computation found in video compression algorithms, such as standards like MPEG-4 and H.263. This paper proposes an embedded reconfigurable array for...
In this paper, we present a method to estimate the number of reconfiguration steps that a time-constrained algorithm can accommodate. This analysis demonstrates how one would attac...