392 search results - page 35 / 79 » The Entropy of FPGA Reconfiguration |
132
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FCCM
2002
IEEE
15 years 6 months ago
2002
IEEE
The paper presents a Design Space Exploration (DSE) experiment which has been carried out in order to determine the optimum FPGA–based Variable-Length Decoder (VLD) computing re...
DAC
2008
ACM
16 years 2 months ago
2008
ACM
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
101
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FPGA
2010
ACM
15 years 10 months ago
2010
ACM
Electronic systems increasingly suffer from component variation, thermal hotspots, uneven wearout, and other subtle physical phenomena. Systems based on FPGAs have unique opportun...
DATE
2009
IEEE
15 years 8 months ago
2009
IEEE
- Clock skew scheduling (CSS) is an effective technique to optimize clock period of sequential designs. However, these techniques are not effective in the presence of certain desig...
AHS
2007
IEEE
15 years 7 months ago
2007
IEEE
We describe the FPGA HPC Alliance’s Parallel Toolkit (PTK), an initial step towards the standardization of high-level configuration and APIs for high-performance reconfigurable ...