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» The Entropy of FPGA Reconfiguration
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HPSR
2011
105views more  HPSR 2011»
14 years 1 months ago
Implementation of ARP-path low latency bridges in Linux and OpenFlow/NetFPGA
Abstract—This paper describes the implementation of ARPPath (a.k.a. FastPath) bridges, a recently proposed concept for low latency bridges, in Linux/Soekris and OpenFlow/NetFPGA ...
Guillermo Ibáñez, Bart De Schuymer, ...
IPPS
2006
IEEE
15 years 7 months ago
Selection of instruction set extensions for an FPGA embedded processor core
A design process is presented for the selection of a set of instruction set extensions for the PowerPC 405 processor that is embedded into the Xilinx Virtex Family of FPGAs. The i...
Brian F. Veale, John K. Antonio, Monte P. Tull, S....
FCCM
2002
IEEE
171views VLSI» more  FCCM 2002»
15 years 6 months ago
Coarse-Grain Pipelining on Multiple FPGA Architectures
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro...
IOLTS
2002
IEEE
148views Hardware» more  IOLTS 2002»
15 years 6 months ago
Active Replication: Towards a Truly SRAM-Based FPGA On-Line Concurrent Testing
The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reco...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...
DATE
2009
IEEE
150views Hardware» more  DATE 2009»
15 years 8 months ago
A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs
—Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencie...
Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Sou...