- An intrinsic embedded online evolution system has been designed using Block-based neural networks and implemented on Xilinx VirtexIIPro FPGAs. The designed network can dynamicall...
In this paper an analysis of a dynamically reconfigurable processor is presented. The network processor incorporates a processor and a number of coprocessors that can be connected...
The increase of the web traffic has created the need for web switches that are able to balance the traffic to the server farms based on their contents (e.g. layer 7 switching). In...
UML 2.0 provides a rich set of diagrams for systems documentation and specification. Many efforts have been undertaken to employ different aspects of UML for multiple domains, mai...
In this paper, we propose two FPGA-area allocation algorithms based on profiling results for reducing the impact on performance of dynamic reconfiguration overheads. The problem o...
Elena Moscu Panainte, Koen Bertels, Stamatis Vassi...