392 search results - page 60 / 79 » The Entropy of FPGA Reconfiguration |
ARC
2007
Springer
15 years 5 months ago
2007
Springer
Abstract. Conventional rigid router-based networks on chip incur certain overheads due to huge occupied logic resources and topology embedding, i.e., the mapping of a logical netwo...
117
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EXPCS
2007
15 years 5 months ago
2007
The evaluation of new network server architectures is usually performed experimentally using either a simulator or a hardware prototype. Accurate simulation of the hardwaresoftwar...
131
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CODES
2006
IEEE
15 years 5 months ago
2006
IEEE
This paper presents a hw/sw codesign methodology based on BORPH, an operating system designed for FPGA-based reconfigurable computers (RC's). By providing native kernel suppo...
125
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FPL
2008
Springer
15 years 2 months ago
2008
Springer
A high-speed and secure dynamic partial reconfiguration (DPR) system is realized with AES-GCM that guarantees both confidentiality and authenticity of FPGA bitstreams. In DPR syst...
101
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ERSA
2006
15 years 2 months ago
2006
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...