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89
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FPL
2007
Springer
115views Hardware» more  FPL 2007»
15 years 6 months ago
Hardware/Software Process Migration and RTL Simulation
This paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of Field Programmable Gate Arr...
Aric D. Blumer, Cameron D. Patterson
96
Voted
OOPSLA
2007
Springer
15 years 6 months ago
Democratizing the cloud
Programming distributed data-intensive web and mobile applications is gratuitously hard. As the world is moving more and more towards the software as services model, we have to co...
Erik Meijer
71
Voted
IPPS
2006
IEEE
15 years 6 months ago
Parallel FPGA-based all-pairs shortest-paths in a directed graph
With rapid advances in VLSI technology, Field Programmable Gate Arrays (FPGAs) are receiving the attention of the Parallel and High Performance Computing community. In this paper,...
Uday Bondhugula, Ananth Devulapalli, Joseph Fernan...
FCCM
2003
IEEE
185views VLSI» more  FCCM 2003»
15 years 5 months ago
Implementation of a Content-Scanning Module for an Internet Firewall
A module has been implemented in Field Programmable Gate Array (FPGA) hardware that scans the content of Internet packets at Gigabit/second rates. All of the packet processing ope...
James Moscola, John W. Lockwood, Ronald Prescott L...
95
Voted
HICSS
2003
IEEE
100views Biometrics» more  HICSS 2003»
15 years 5 months ago
An Examination of DSLs for Concisely Representing Model Traversals and Transformations
A key advantage for the use of a Domain-Specific Language (DSL) is the leverage that can be captured from a concise representation of a programmer’s intention. This paper report...
Jeff Gray, Gabor Karsai