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HPCA
2004
IEEE
16 years 29 days ago
Stream Register Files with Indexed Access
Many current programmable architectures designed to exploit data parallelism require computation to be structured to operate on sequentially accessed vectors or streams of data. A...
Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, William ...
AFP
2008
Springer
236views Formal Methods» more  AFP 2008»
15 years 7 months ago
A Tutorial on Parallel and Concurrent Programming in Haskell
This practical tutorial introduces the features available in Haskell for writing parallel and concurrent programs. We first describe how to write semi-explicit parallel programs b...
Simon L. Peyton Jones, Satnam Singh
MICRO
2008
IEEE
109views Hardware» more  MICRO 2008»
15 years 7 months ago
Dependence-aware transactional memory for increased concurrency
—Transactional memory (TM) is a promising paradigm for helping programmers take advantage of emerging multicore platforms. Though they perform well under low contention, hardware...
Hany E. Ramadan, Christopher J. Rossbach, Emmett W...
ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
15 years 4 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
138
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FPL
2010
Springer
170views Hardware» more  FPL 2010»
14 years 10 months ago
IP Based Configurable SIMD Massively Parallel SoC
Significant advances in the field of configurable computing have enabled parallel processing within a single FieldProgrammable Gate Array (FPGA) chip. This paper presents the imple...
Mouna Baklouti, Mohamed Abid, Philippe Marquet, Je...