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» The Future Is Parallel But It May Not Be Easy
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SAC
2009
ACM
15 years 4 months ago
Celling SHIM: compiling deterministic concurrency to a heterogeneous multicore
Parallel architectures are the way of the future, but are notoriously difficult to program. In addition to the low-level constructs they often present (e.g., locks, DMA, and non-...
Nalini Vasudevan, Stephen A. Edwards
ICPP
1999
IEEE
15 years 2 months ago
Impact on Performance of Fused Multiply-Add Units in Aggressive VLIW Architectures
Loops are the main time consuming part of programs based on floating point computations. The performance of the loops is limited either by recurrences in the computation or by the...
David López, Josep Llosa, Eduard Ayguad&eac...
ISORC
2008
IEEE
15 years 4 months ago
Structural Model of Real-Time Databases: An Illustration
A real-time database is a database in which both the data and the operations upon the data may have timing constraints. The design of this kind of database requires the introducti...
Nizar Idoudi, Claude Duvallet, Bruno Sadeg, Rafik ...
EUROPAR
2007
Springer
15 years 4 months ago
Toward Scalable Matrix Multiply on Multithreaded Architectures
We show empirically that some of the issues that affected the design of linear algebra libraries for distributed memory architectures will also likely affect such libraries for s...
Bryan Marker, Field G. Van Zee, Kazushige Goto, Gr...
IPPS
2006
IEEE
15 years 3 months ago
Similarity-aware query processing in sensor networks
We assume a sensor network with data-centric storage, where sensor data is stored within the sensor network and ad hoc queries are disseminated and processed inside the network. I...
Ping Xia, Panos K. Chrysanthis, Alexandros Labrini...