Program verification is a promising approach to improving program quality, because it can search all possible program executions for specific errors. However, the need to formally...
Glenn Ammons, James R. Larus, Rastislav Bodí...
—Scenarios are increasingly recognized as an effective means for eliciting, validating, and documenting software requirements. This paper concentrates on the use of scenarios for...
Recently, the ITU-standardised specification language Message Sequence Chart has been extended with constructs for more complete and structured specifications. The new version of ...
This paper describes a new approach to specifying graphical layouts of arbitrary objects, which is based on a TEXlike notation. Our simplest scheme offers specifications similar t...
Abstract. To support model-based development and analysis of embedded systems, the specification language VDM++ has been extended with asynchronous communication and improved timin...