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» The General Architecture of Generation in ACORD
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VLSID
2001
IEEE
200views VLSI» more  VLSID 2001»
15 years 10 months ago
Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures
The emergence of several communication architectures for System-on-Chips provides designers with a variety of design alternatives. In addition, the need to customize the system ar...
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
ATAL
2009
Springer
15 years 4 months ago
A self-organizing neural network architecture for intentional planning agents
This paper presents a model of neural network embodiment of intentions and planning mechanisms for autonomous agents. The model bridges the dichotomy of symbolic and non-symbolic ...
Budhitama Subagdja, Ah-Hwee Tan
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 2 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
ASPLOS
2010
ACM
15 years 4 months ago
Dynamic filtering: multi-purpose architecture support for language runtime systems
This paper introduces a new abstraction to accelerate the readbarriers and write-barriers used by language runtime systems. We exploit the fact that, dynamically, many barrier exe...
Tim Harris, Sasa Tomic, Adrián Cristal, Osm...
XSYM
2007
Springer
123views Database» more  XSYM 2007»
15 years 3 months ago
Let a Single FLWOR Bloom
To globally optimize execution plans for XQuery expressions, a plan generator must generate and compare plan alternatives. In proven compiler architectures, the unit of plan genera...
Matthias Brantner, Carl-Christian Kanne, Guido Moe...