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» The General Architecture of Generation in ACORD
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CGO
2003
IEEE
15 years 3 months ago
Addressing Mode Selection
Many processor architectures provide a set of addressing modes in their address generation units. For example DSPs (digital signal processors) have powerful addressing modes for e...
Erik Eckstein, Bernhard Scholz
CSMR
2003
IEEE
15 years 3 months ago
CodeCrawler - Lessons Learned in Building a Software Visualization Tool
Software visualization tools face many challenges in terms of their implementation, including scalability, usability, adaptability, and durability. Such tools, like many other res...
Michele Lanza
GLVLSI
2003
IEEE
132views VLSI» more  GLVLSI 2003»
15 years 3 months ago
A highly regular multi-phase reseeding technique for scan-based BIST
In this paper a novel reseeding architecture for scan-based BIST, which uses an LFSR as TPG, is proposed. Multiple cells of the LFSR are utilized as sources for feeding the scan c...
Emmanouil Kalligeros, Xrysovalantis Kavousianos, D...
DAC
2003
ACM
15 years 3 months ago
Realizable RLCK circuit crunching
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Isma...
DEBS
2003
ACM
15 years 3 months ago
Client mobility in rendezvous-notify
Event-based computing is vital for the next generation mobile services and applications that need to meet user requirements irrespective of time and location. The event paradigm i...
Sasu Tarkoma, Jaakko Kangasharju, Kimmo E. E. Raat...