Sciweavers

617 search results - page 66 / 124
» The General Architecture of Generation in ACORD
Sort
View
MSWIM
2005
ACM
15 years 3 months ago
Huginn: a 3D visualizer for wireless ns-2 traces
Discrete-event network simulation is a major tool for the research and development of mobile ad-hoc networks (MANETs). These simulations are used for debugging, teaching, understa...
Björn Scheuermann, Holger Füßler, ...
ASPLOS
2004
ACM
15 years 3 months ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man...
SPIN
2004
Springer
15 years 3 months ago
Explicit State Model Checking with Hopper
The Murϕ-based Hopper tool is a general purpose explicit model checker. Hopper leverages Murϕ’s class structure to implement new algorithms. Hopper differs from Murϕ in that i...
Michael Jones, Eric Mercer
DAC
2009
ACM
15 years 10 months ago
Context-sensitive timing analysis of Esterel programs
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...
Lei Ju, Bach Khoa Huynh, Samarjit Chakraborty, Abh...
DAC
2006
ACM
15 years 10 months ago
Timing-based delay test for screening small delay defects
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram