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SBCCI
2004
ACM
117views VLSI» more  SBCCI 2004»
15 years 6 months ago
Reducing test time with processor reuse in network-on-chip based systems
This paper proposes a test planning method capable of reusing available processors as test sources and sinks, and the on-chip network as the access mechanism for the test of cores...
Alexandre M. Amory, Érika F. Cota, Marcelo ...
CIKM
2007
Springer
15 years 5 months ago
A comparison of statistical significance tests for information retrieval evaluation
Information retrieval (IR) researchers commonly use three tests of statistical significance: the Student's paired t-test, the Wilcoxon signed rank test, and the sign test. Ot...
Mark D. Smucker, James Allan, Ben Carterette
GECCO
2008
Springer
172views Optimization» more  GECCO 2008»
15 years 2 months ago
Empirical analysis of a genetic algorithm-based stress test technique
Evolutionary testing denotes the use of evolutionary algorithms, e.g., Genetic Algorithms (GAs), to support various test automation tasks. Since evolutionary algorithms are heuris...
Vahid Garousi
IIE
2007
159views more  IIE 2007»
15 years 1 months ago
Creating and Visualizing Test Data from Programming Exercises
Automatic assessment of programming exercises is typically based on testing approach. Most automatic assessment frameworks execute tests and evaluate test results automatically, bu...
Petri Ihantola
ECCC
2011
223views ECommerce» more  ECCC 2011»
14 years 8 months ago
A Case of Depth-3 Identity Testing, Sparse Factorization and Duality
Polynomial identity testing (PIT) problem is known to be challenging even for constant depth arithmetic circuits. In this work, we study the complexity of two special but natural ...
Chandan Saha, Ramprasad Saptharishi, Nitin Saxena