2424 search results - page 34 / 485 » The High Level Architecture for Simulations |
110
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WSC
2008
15 years 4 months ago
2008
Simulation techniques can provide a resource-driven schedule and answer many hypothetical scenarios before project execution to improve on conventional project management software...
150
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CCGRID
2005
IEEE
15 years 7 months ago
2005
IEEE
In this article we present the design choices and the evaluation of a batch scheduler for large clusters, named OAR. This batch scheduler is based upon an original design that emp...
119
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CORR
2006
Springer
15 years 1 months ago
2006
Springer
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
127
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DAC
2001
ACM
16 years 2 months ago
2001
ACM
The quality of synthesis results for most high level synthesis approaches is strongly a ected by the choice of control ow through conditions and loops in the input description. In...
107
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ERSA
2006
15 years 3 months ago
2006
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...