3922 search results - page 3 / 785 » The IA-64 Architecture at Work |
FMCAD
2000
Springer
15 years 1 months ago
2000
Springer
Abstract. We have formal verified a number of algorithms for evaluating transcendental functions in double-extended precision floating point arithmetic in the Intel
TPHOL
1999
IEEE
15 years 1 months ago
1999
IEEE
Abstract. Intel is applying formal verification to various pieces of mathematical software used in Merced, the first implementation of the new IA-64 architecture. This paper discus...
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WIESS
2000
14 years 10 months ago
2000
HP Caliper is an architecture for software developer tools that deal with executable (binary) programs. It provides a common framework that allows building of a wide variety of to...
ACMMSP
2004
ACM
15 years 2 months ago
2004
ACM
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
MICRO
2003
IEEE
15 years 2 months ago
2003
IEEE
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...