Sciweavers

1516 search results - page 197 / 304
» The Increasing Nvalue Constraint
Sort
View
CODES
2005
IEEE
15 years 10 months ago
Retargetable generation of TLM bus interfaces for MP-SoC platforms
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, H...
CODES
2005
IEEE
15 years 10 months ago
Iterational retiming: maximize iteration-level parallelism for nested loops
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP) applications. It is important to study effective and efficient transformation ...
Chun Xue, Zili Shao, Meilin Liu, Edwin Hsing-Mean ...
DATE
2005
IEEE
117views Hardware» more  DATE 2005»
15 years 10 months ago
A Quality-of-Service Mechanism for Interconnection Networks in System-on-Chips
As Moore’s Law continues to fuel the ability to build ever increasingly complex system-on-chips (SoCs), achieving performance goals is rising as a critical challenge to completi...
Wolf-Dietrich Weber, Joe Chou, Ian Swarbrick, Drew...
EEE
2005
IEEE
15 years 10 months ago
Towards Effective Web Site Designs: A Framework for Modeling, Design Evaluation and Enhancement
Effective Web site design is critical to the success of e-commerce. Therefore, the evaluation and enhancement of a Web site design is of great importance. In this vein, accessibil...
Benjamin Yen, Paul Jen-Hwa Hu, May Wang
EUROMICRO
2005
IEEE
15 years 10 months ago
Composition Assessment Metrics for CBSE
Objective: Formal definition of composition assessment metrics for CBSE, using an extension of the CORBA Component Model metamodel as the ontology for describing component assembl...
Miguel Goulão, Fernando Brito e Abreu