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ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Variability-driven module selection with joint design time optimization and post-silicon tuning
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
Feng Wang 0004, Xiaoxia Wu, Yuan Xie
CASES
2008
ACM
14 years 11 months ago
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
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CIKM
2008
Springer
14 years 11 months ago
A consensus based approach to constrained clustering of software requirements
Managing large-scale software projects involves a number of activities such as viewpoint extraction, feature detection, and requirements management, all of which require a human a...
Chuan Duan, Jane Cleland-Huang, Bamshad Mobasher
CASES
2005
ACM
14 years 11 months ago
Optimizing stream programs using linear state space analysis
Digital Signal Processing (DSP) is becoming increasingly widespread in portable devices. Due to harsh constraints on power, latency, and throughput in embedded environments, devel...
Sitij Agrawal, William Thies, Saman P. Amarasinghe
IPSN
2010
Springer
14 years 11 months ago
Hibernets: energy-efficient sensor networks using analog signal processing
In-network processing is recommended for many sensor network applications to reduce communication and improve energy efficiency. However, constraints on memory, speed, and energy ...
Brandon Rumberg, David W. Graham, Vinod Kulathuman...