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DAC
2005
ACM
15 years 10 months ago
Logic block clustering of large designs for channel-width constrained FPGAs
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
Marvin Tom, Guy G. Lemieux
CCGRID
2008
IEEE
15 years 4 months ago
GridBatch: Cloud Computing for Large-Scale Data-Intensive Batch Applications
To be competitive, Enterprises are collecting and analyzing increasingly large amount of data in order to derive business insights. However, there are at least two challenges to m...
Huan Liu, Dan Orban
DATE
2008
IEEE
75views Hardware» more  DATE 2008»
15 years 4 months ago
Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization
With technology advances, the number of cores integrated on a chip and their speed of operation is increasing. This, in turn is leading to a significant increase in chip temperat...
Srinivasan Murali, Almir Mutapcic, David Atienza, ...
CODES
2006
IEEE
15 years 3 months ago
The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications
Modern embedded systems for image processing involve increasingly complex levels of functionality under real-time and resourcerelated constraints. As this complexity increases, th...
Dong-Ik Ko, Shuvra S. Bhattacharyya
INFOCOM
2002
IEEE
15 years 2 months ago
ASCENT: Adaptive Self-Configuring sEnsor Networks Topologies.
—Advances in microsensor and radio technology will enable small but smart sensors to be deployed for a wide range of environmental monitoring applications. The low per-node cost ...
Alberto Cerpa, Deborah Estrin