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» The Interaction of Architecture and Operating System Design
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DATE
2003
IEEE
104views Hardware» more  DATE 2003»
15 years 3 months ago
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
George Lykakis, N. Mouratidis, Kyriakos Vlachos, N...
73
Voted
IJCNN
2000
IEEE
15 years 2 months ago
Simulation of a Digital Neuro-Chip for Spiking Neural Networks
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...
Tim Schönauer, S. Atasoy, N. Mehrtash, Heinri...
90
Voted
FPGA
2006
ACM
117views FPGA» more  FPGA 2006»
15 years 1 months ago
Context-free-grammar based token tagger in reconfigurable devices
In this paper, we present reconfigurable hardware architecture for detecting semantics of streaming data on 1+ Gbps networks. The design leverages on the characteristics of contex...
Young H. Cho, James Moscola, John W. Lockwood
CF
2008
ACM
14 years 11 months ago
Fpga-based prototype of a pram-on-chip processor
PRAM (Parallel Random Access Model) has been widely regarded a desirable parallel machine model for many years, but it is also believed to be "impossible in reality." As...
Xingzhi Wen, Uzi Vishkin
FPL
2008
Springer
131views Hardware» more  FPL 2008»
14 years 11 months ago
Enhancing COPACOBANA for advanced applications in cryptography and cryptanalysis
Cryptanalysis of symmetric and asymmetric ciphers is a challenging task due to the enormous amount of involved computations. To tackle this computational complexity, usually the e...
Tim Güneysu, Christof Paar, Gerd Pfeiffer, Ma...