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CODES
2006
IEEE
15 years 8 months ago
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
Antonis Papanikolaou, T. Grabner, Miguel Miranda, ...
ICC
2009
IEEE
135views Communications» more  ICC 2009»
15 years 7 days ago
A Discrete Channel Model for Capturing Memory and Soft-Decision Information: A Capacity Study
A discrete (binary-input 2q -ary output) communication channel with memory is introduced with the objective to judiciously capture both the statistical memory and the soft-decision...
Cecilio Pimentel, Fady Alajaji
WSC
1997
15 years 3 months ago
Modeling a 10 Gbit/s/Port Shared Memory ATM Switch
The speed of optical transmission links is growing at a rate which is difficult for the micro-electronic technology of ATM switches to follow. In order to cover the transmission r...
Tawfik Lazraq, Jakob Brundin, Per Andersson, &Arin...
108
Voted
IAT
2008
IEEE
15 years 9 months ago
An Agent Memory Model Enabling Rational and Biased Reasoning
This paper presents an architecture for a memory model that facilitates versatile reasoning mechanisms over the beliefs stored in an agent’s belief base. Based on an approach fo...
Annerieke Heuvelink, Michel C. A. Klein, Jan Treur
131
Voted
ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
15 years 4 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...