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HPCA
2005
IEEE
16 years 6 months ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob
189
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ARCS
2009
Springer
16 years 1 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
DSN
2007
IEEE
16 years 25 days ago
Electing an Eventual Leader in an Asynchronous Shared Memory System
This paper considers the problem of electing an eventual leader in an asynchronous shared memory system. While this problem has received a lot of attention in messagepassing syste...
Antonio Fernández, Ernesto Jiménez, ...
SIGSOFT
2006
ACM
16 years 13 days ago
Memories of bug fixes
The change history of a software project contains a rich collection of code changes that record previous development experience. Changes that fix bugs are especially interesting, ...
Sunghun Kim, Kai Pan, E. James Whitehead Jr.
EMSOFT
2007
Springer
16 years 19 days ago
Uniformity improving page allocation for flash memory file systems
Flash memory is a storage medium that is becoming more and more popular. Though not yet fully embraced in traditional computing systems, Flash memory is prevalent in embedded syst...
Seungjae Baek, Seongjun Ahn, Jongmoo Choi, Donghee...