As device geometries continue to shrink, single event upsets are becoming of concern to a wider spectrum of system designers. These “soft errors” can be a nuisance or catastro...
In this paper, we have analyzed ond modeled the fiilure probabilities ofSRAM cells due to process parameter variations. A method to predict the yield of a memoiy chip based on the...
This paper first defines the n-input q-output WS function, as a mathematical model of the combinational part of the distributed arithmetic of a finite impulse response (FIR) ...
Abstract. Nowadays computer graphics hardware presents a series of characteristics, such as AGP memory, vertex cache, etc., that can be used for real-time rendering. The aim of thi...
We present a framework (Real-Time Calculus) for analysing various system properties pertaining to timing analysis, loads on various components and on-chip buffer memory requiremen...