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JSSPP
1997
Springer
15 years 1 months ago
An Experimental Evaluation of Processor Pool-Based Scheduling for Shared-Memory NUMA Multiprocessors
In this paper we describe the design, implementation and experimental evaluation of a technique for operating system schedulers called processor pool-based scheduling [51]. Our tec...
Tim Brecht
ISCAS
1994
IEEE
138views Hardware» more  ISCAS 1994»
15 years 1 months ago
High-Throughput Data Compressor Designs Using Content Addressable Memory
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
Ren-Yang Yang, Chen-Yi Lee
APN
1993
Springer
15 years 1 months ago
Transient Analysis of Deterministic and Stochastic Petri Nets
This paper introduces an efficient numerical algorithm for transient analysis of deterministic and stochastic Petri nets (DSPNs) and other discrete-event stochastic systems with ...
Hoon Choi, Vidyadhar G. Kulkarni, Kishor S. Trived...
ACMICEC
2007
ACM
245views ECommerce» more  ACMICEC 2007»
15 years 1 months ago
Keyword generation for search engine advertising using semantic similarity between terms
An important problem in search engine advertising is keyword1 generation. In the past, advertisers have preferred to bid for keywords that tend to have high search volumes and hen...
Vibhanshu Abhishek, Kartik Hosanagar
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
15 years 1 months ago
VLSI Design of Multi Standard Turbo Decoder for 3G and Beyond
Turbo decoding architectures have greater error correcting capability than any other known code. Due to their excellent performance turbo codes have been employed in several trans...
Imran Ahmed, Tughrul Arslan