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» The Limits of Quantum Computers
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IEEEPACT
2006
IEEE
15 years 6 months ago
Overlapping dependent loads with addressless preload
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
Zhen Yang, Xudong Shi, Feiqi Su, Jih-Kwon Peir
95
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IISWC
2006
IEEE
15 years 6 months ago
Comparing Benchmarks Using Key Microarchitecture-Independent Characteristics
— Understanding the behavior of emerging workloads is important for designing next generation microprocessors. For addressing this issue, computer architects and performance anal...
Kenneth Hoste, Lieven Eeckhout
VLSID
2006
IEEE
183views VLSI» more  VLSID 2006»
15 years 6 months ago
Design Challenges for High Performance Nano-Technology
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
Goutam Debnath, Paul J. Thadikaran
VLSID
2006
IEEE
169views VLSI» more  VLSID 2006»
15 years 6 months ago
A Low Leakage and SNM Free SRAM Cell Design in Deep Sub Micron CMOS Technology
As the IC process technology scales, the oxide thickness and operating voltage continues to decrease. The gate oxide thickness in recent and future IC process technology has appro...
Sanjeev K. Jain, Pankaj Agarwal
81
Voted
VTC
2006
IEEE
15 years 6 months ago
Throughput Performance of Iterative Frequency-Domain SIC with 2D MMSE-FDE for SC-MIMO Multiplexing
— Broadband wireless packet access will be the core technology of the next generation mobile communication systems. For very high-speed and high-quality packet transmissions in a...
Akinori Nakajima, Fumiyuki Adachi
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