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» The Logical Structure of Binding
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FMCAD
2007
Springer
15 years 4 months ago
Formal Verification of Partial Good Self-Test Fencing Structures
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
Adrian E. Seigler, Gary A. Van Huben, Hari Mony
CDB
2004
Springer
158views Database» more  CDB 2004»
15 years 1 months ago
Constraint Databases, Data Structures and Efficient Query Evaluation
Abstract. Constraint databases that can be described by boolean combinations of polynomial inequalities over the reals have received ample research attention. In particular, the ex...
Joos Heintz, Bart Kuijpers
ENTCS
2007
124views more  ENTCS 2007»
14 years 10 months ago
Structuring Optimizing Transformations and Proving Them Sound
A compiler optimization is sound if the optimized program that it produces is semantically equivalent to the input program. The proofs of semantic equivalence are usually tedious....
Aditya Kanade, Amitabha Sanyal, Uday P. Khedker
NJC
2006
86views more  NJC 2006»
14 years 10 months ago
Structured Formal Development in Isabelle
Abstract. General purpose theorem provers provide advanced facilities for proving properties about specifications, and may therefore be a valuable tool in formal program developmen...
Maksym Bortin, Einar Broch Johnsen, Christoph L&uu...
ICCAD
2009
IEEE
119views Hardware» more  ICCAD 2009»
14 years 7 months ago
Iterative layering: Optimizing arithmetic circuits by structuring the information flow
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
Ajay K. Verma, Philip Brisk, Paolo Ienne