20 search results - page 3 / 4 » The Master-Slave Paradigm with Heterogeneous Processors |
DATE
2006
IEEE
14 years 9 days ago
2006
IEEE
transistors the design of the SoC needs to be moved to a higher level of abstraction. We need to think in processors and interconnects rather than gates and wires. We discuss the n...
HPCC
2007
Springer
14 years 12 days ago
2007
Springer
This paper presents a publish/subscribe based asynchronous remote method invocation framework (PARMI) aiming to improve performance and programming flexibility. PARMI enables high-...
SBACPAD
2008
IEEE
14 years 19 days ago
2008
IEEE
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
MVA
1992
13 years 7 months ago
1992
In this work the Low Level Vision Unit (LLVU) of the Heterogeneous and Reconfigurable Machine for Image Analysis (HERMIA) is described. The LLVU consists of the innovative integra...
LCTRTS
2010
Springer
14 years 1 months ago
2010
Springer
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...