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VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
15 years 4 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
WPES
2006
ACM
15 years 4 months ago
Nonesuch: a mix network with sender unobservability
Oblivious submission to anonymity systems is a process by which a message may be submitted in such a way that neither the anonymity network nor a global passive adversary may dete...
Thomas S. Heydt-Benjamin, Andrei Serjantov, Beness...
CODES
2005
IEEE
15 years 3 months ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...
CODES
2005
IEEE
15 years 3 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
MM
2005
ACM
219views Multimedia» more  MM 2005»
15 years 3 months ago
Pervasive views: area exploration and guidance using extended image media
This work achieves full registration of scenes in a large area and creates visual indexes for visualization in a digital city. We explore effective mapping, indexing, and display ...
Jiang Yu Zheng, Xiaolong Wang
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