27 search results - page 1 / 6 » The Memory Bandwidth Bottleneck and its Amelioration by a Co... |
76
Voted
IPPS
2000
IEEE
15 years 1 months ago
2000
IEEE
As the speed gap between CPU and memory widens, memory hierarchy has become the primary factor limiting program performance. Until now, the principal focus of hardware and softwar...
111
click to vote
IPPS
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
ASPLOS
2004
ACM
15 years 3 months ago
2004
ACM
This paper introduces a compiler-orchestrated prefetching system as a unified framework geared toward ameliorating the gap between processing speeds and memory access latencies. ...
88
Voted
ICS
1999
Tsinghua U.
15 years 1 months ago
1999
Tsinghua U.
This paper presents a technique, adaptive replication, for automatically eliminating synchronization bottlenecks in multithreaded programs that perform atomic operations on object...
84
Voted
IPPS
2008
IEEE
15 years 4 months ago
2008
IEEE
—The performance bottleneck for many scientific applications is the cost of memory access inside linear algebra kernels. Tuning such kernels for memory efficiency is a complex ...