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ISSTA
1998
ACM
15 years 6 months ago
Automatic Test Data Generation Using Constraint Solving Techniques
Automatic test data generation leads to identify input values on which a selected point in a procedure is executed. This paper introduces a new method for this problem based on co...
Arnaud Gotlieb, Bernard Botella, Michel Rueher
JSSPP
1997
Springer
15 years 6 months ago
An Experimental Evaluation of Processor Pool-Based Scheduling for Shared-Memory NUMA Multiprocessors
In this paper we describe the design, implementation and experimental evaluation of a technique for operating system schedulers called processor pool-based scheduling [51]. Our tec...
Tim Brecht
EURODAC
1994
IEEE
130views VHDL» more  EURODAC 1994»
15 years 6 months ago
RESIST: a recursive test pattern generation algorithm for path delay faults
This paper presents Resist, a recursive test pattern generation (TPG) algorithm for path delay fault testing of scan-based circuits. In contrast to other approaches, it exploits t...
Karl Fuchs, Michael Pabst, Torsten Rössel
RTSS
1994
IEEE
15 years 6 months ago
Guaranteeing End-to-End Timing Constraints by Calibrating Intermediate Processes
This paper presents a comprehensive design methodology for guaranteeing end-to-end requirements of real-time systems. Applications are structured as a set of process components co...
Richard Gerber, Seongsoo Hong, Manas Saksena
DAC
1994
ACM
15 years 6 months ago
Dynamic Search-Space Pruning Techniques in Path Sensitization
A powerful combinational path sensitization engine is required for the efficient implementation of tools for test pattern generation, timing analysis, and delay fault testing. Path...
João P. Marques Silva, Karem A. Sakallah