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ICCAD
2010
IEEE
148views Hardware» more  ICCAD 2010»
14 years 8 months ago
Trace signal selection to enhance timing and logic visibility in post-silicon validation
Trace buffer technology allows tracking the values of a few number of state elements inside a chip within a desired time window, which is used to analyze logic errors during post-s...
Hamid Shojaei, Azadeh Davoodi
IHI
2010
186views Healthcare» more  IHI 2010»
14 years 4 months ago
Analysis of an online health social network
With the continued advances of Web 2.0, health-centered Online Social Networks (OSNs) are emerging to provide knowledge and support for those interested in managing their own heal...
Xiaoxiao Ma, Guanling Chen, Juntao Xiao
ISCA
2011
IEEE
238views Hardware» more  ISCA 2011»
14 years 1 months ago
Rebound: scalable checkpointing for coherent shared memory
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...
Rishi Agarwal, Pranav Garg, Josep Torrellas
SIGSOFT
2004
ACM
15 years 10 months ago
PSE: explaining program failures via postmortem static analysis
In this paper, we describe PSE (Postmortem Symbolic Evaluation), a static analysis algorithm that can be used by programmers to diagnose software failures. The algorithm requires ...
Roman Manevich, Manu Sridharan, Stephen Adams, Man...
CLEF
2007
Springer
15 years 4 months ago
ParaMor: Finding Paradigms across Morphology
Our algorithm, ParaMor, fared well in Morpho Challenge 2007 (Kurimo et al., 2007), a peer operated competition pitting against one another algorithms designed to discover the morp...
Christian Monson, Jaime G. Carbonell, Alon Lavie, ...