1542 search results - page 36 / 309 » The Observational Power of Clocks |
ISLPED
1998
ACM
15 years 1 months ago
1998
ACM
Adiabatic logic promises extremely low power consumption for those applications where slower clock rates are acceptable. However, there have been very few adiabatic memory designs...
63
Voted
ACSD
2010
IEEE
14 years 7 months ago
2010
IEEE
Abstract--Clock gating and operand isolation are two techniques to reduce the power consumption in state-of-the-art hardware designs. Both approaches basically follow a two-step pr...
ISLPED
2003
ACM
15 years 2 months ago
2003
ACM
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...
82
Voted
DAC
2008
ACM
15 years 10 months ago
2008
ACM
This paper discusses the use of networks-on-chip (NoCs) consisting of multiple voltage-frequency islands to cope with power consumption, clock distribution and parameter variation...
66
Voted
ISCAS
2008
IEEE
15 years 4 months ago
2008
IEEE
—This study describes a method of implementing a fully integrated ultra-low-power (ULP) radio for wireless sensor networks (WSNs). This is achieved using an ad hoc modulation sch...