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» The Observational Power of Clocks
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GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
15 years 3 months ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann
ICONS
2009
IEEE
15 years 4 months ago
Power Saving of Real Time Embedded Sensor for Medical Remote Monitoring
The power saving is one of the important issue in the embedded systems. To reduce the consumption of the microprocessor of such a system, a way is to power down it when it is inac...
Frederic Fauberteau, Serge Midonnet, Dan Istrate
ICCD
2003
IEEE
105views Hardware» more  ICCD 2003»
15 years 6 months ago
Power Fluctuation Minimization During Behavioral Synthesis using ILP-Based Datapath Scheduling
— We model the power fluctuation as cycle-to-cycle power gradient and minimize the mean of the power gradients using ILP. We propose scheduling schemes for three modes of datapa...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
SAMOS
2007
Springer
15 years 3 months ago
Low-Power Twiddle Factor Unit for FFT Computation
An integral part of FFT computation are the twiddle factors, which, in software implementations, are typically stored into RAM memory implying large memory footprint and power cons...
Teemu Pitkänen, Tero Partanen, Jarmo Takala
COCO
2010
Springer
153views Algorithms» more  COCO 2010»
15 years 1 months ago
Communication Complexity with Synchronized Clocks
Abstract—We consider two natural extensions of the communication complexity model that are inspired by distributed computing. In both models, two parties are equipped with synchr...
Russell Impagliazzo, Ryan Williams