1542 search results - page 50 / 309 » The Observational Power of Clocks |
ISLPED
1999
ACM
15 years 2 months ago
1999
ACM
Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
127
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AHS
2007
IEEE
15 years 4 months ago
2007
IEEE
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
ASPDAC
2004
ACM
15 years 3 months ago
2004
ACM
This paper proposes a thread partitioning algorithm in low power high-level synthesis. The algorithm is applied to high-level synthesis systems. In the systems, we can describe pa...
DATE
1998
IEEE
15 years 2 months ago
1998
IEEE
The power dissipated by system-level buses is the largest contribution to the global power of complex VLSI circuits. Therefore, the minimization of the switching activity at the I...
137
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ISLPED
1995
ACM
15 years 1 months ago
1995
ACM
When estimating the dynamic power dissipated by a circuit di erent methods ranging from numeric analog simulation to event-driven logic simulation have been proposed. However, as ...