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ASPDAC
2007
ACM
93views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Flow-Through-Queue based Power Management for Gigabit Ethernet Controller
- This paper presents a novel architectural mechanism and a power management structure for the design of an energy-efficient Gigabit Ethernet controller. Key characteristics of suc...
Hwisung Jung, Andy Hwang, Massoud Pedram
HPCA
2003
IEEE
15 years 10 months ago
Power-Aware Control Speculation through Selective Throttling
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
Juan L. Aragón, José González...
ISCAS
2007
IEEE
113views Hardware» more  ISCAS 2007»
15 years 4 months ago
A Low Power 4-bit Interleaved Burst Sampling ADC for Sub-GHz Impulse UWB Radio
Abstract—This paper presents a low power 4-bit ADC for subGHz Ultra Wideband (UWB) receivers. The power efficiency is achieved by taking advantage of the low duty cycle feature o...
Xiaodong Zhang, Magdy Bayoumi
ISQED
2006
IEEE
101views Hardware» more  ISQED 2006»
15 years 3 months ago
Compiler-Directed Power Density Reduction in NoC-Based Multi-Core Designs
As transistor counts keep increasing and clock frequencies rise, high power consumption is becoming one of the most important obstacles, preventing further scaling and performance...
Sri Hari Krishna Narayanan, Mahmut T. Kandemir, Oz...
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 2 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...