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» The Observational Power of Clocks
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DATE
2006
IEEE
112views Hardware» more  DATE 2006»
15 years 3 months ago
A fast-lock mixed-mode DLL with wide-range operation and multiphase outputs
This paper describes a fast-lock mixed-mode delaylocked loop (MMDLL) for wide-range operation and multiphase outputs. The architecture of the proposed DLL uses the mixed-mode time...
Kuo-Hsing Cheng, Yu-lung Lo
ICCAD
2001
IEEE
185views Hardware» more  ICCAD 2001»
15 years 6 months ago
Application-Driven Processor Design Exploration for Power-Performance Trade-off Analysis
1 - This paper presents an efficient design exploration environment for high-end core processors. The heart of the proposed design exploration framework is a two-level simulation e...
Diana Marculescu, Anoop Iyer
IPSN
2003
Springer
15 years 3 months ago
Power-Aware Acoustic Processing
We investigated the tradeoffs between accuracy and battery-energy longevity of acoustic beamforming on disposable sensor nodes subject to varying key parameters: 1) number of micr...
Ronald Riley, Brian Schott, Joseph Czarnaski, Sohi...
ASPDAC
2007
ACM
107views Hardware» more  ASPDAC 2007»
15 years 1 months ago
A Technique to Reduce Peak Current and Average Power Dissipation in Scan Designs by Limited Capture
Abstract-- In this paper, a technique that can efficiently reduce peak and average switching activity during test application is proposed. The proposed method does not require any ...
Seongmoon Wang, Wenlong Wei
ASYNC
2002
IEEE
124views Hardware» more  ASYNC 2002»
15 years 2 months ago
Synchronous Interlocked Pipelines
In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease...
Hans M. Jacobson, Prabhakar Kudva, Pradip Bose, Pe...