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» The Optimisation of Unitising Designs
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AHS
2006
IEEE
137views Hardware» more  AHS 2006»
15 years 3 months ago
Genetic Algorithm based Engine for Domain-Specific Reconfigurable Arrays
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
Wing On Fung, Tughrul Arslan, Sami Khawam
ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
15 years 3 months ago
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
Yu Zhou, Danil Sokolov, Alexandre Yakovlev
CEC
2005
IEEE
15 years 3 months ago
Evolutionary Solo Pong players
An Internet Java Applet http://www.cs.essex.ac.uk/staff/poli/ SoloPong/ allows users anywhere to play the Solo Pong game. We compare people’s performance to a hand coded “Optim...
William B. Langdon, Riccardo Poli
DELTA
2010
IEEE
15 years 2 months ago
Algorithm Transformation for FPGA Implementation
— High level hardware description languages aim to make hardware design more like programming software. These languages are often used to accelerate legacy software algorithms by ...
Donald G. Bailey, Christopher T. Johnston
EH
2002
IEEE
104views Hardware» more  EH 2002»
15 years 2 months ago
Evolvable Hardware for the Generation of Sequential Filter Circuits
Evolutionary algorithms (EAs) are regularly used both for the solution of scheduling problems, and for the creation of digital circuit designs. This paper describes a unified app...
Robert Thomson, Tughrul Arslan