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NETWORKING
2007
14 years 11 months ago
Accelerated Packet Placement Architecture for Parallel Shared Memory Routers
Abstract. Parallel shared memory (PSM) routers represent an architectural approach for addressing the high memory bandwidth requirements dictated by output-queued switches. A funda...
Brad Matthews, Itamar Elhanany, Vahid Tabatabaee
INFOCOM
2007
IEEE
15 years 4 months ago
Feedforward SDL Constructions of Output-Buffered Multiplexers and Switches with Variable Length Bursts
Abstract— In this paper, we study the problem of exact emulation of two types of optical queues: (i) N-to-1 output-buffered multiplexers with variable length bursts, and (ii) N Ć...
Yi-Ting Chen, Cheng-Shang Chang, Jay Cheng, Duan-S...
SODA
2003
ACM
157views Algorithms» more  SODA 2003»
14 years 11 months ago
Competitive queueing policies for QoS switches
We consider packet scheduling in a network providing differentiated services, where each packet is assigned a value. We study various queueing models for supporting QoS (Quality ...
Nir Andelman, Yishay Mansour, An Zhu
LCN
2005
IEEE
15 years 3 months ago
Rate-based Flow-control for the CICQ Switch
A combined input and crosspoint queued (CICQ) switch with a flow control latency of round-trip time (RTT) packets requires each crosspoint (CP) buffer to hold the RTT packets in o...
Kenji Yoshigoe
IEEEIAS
2008
IEEE
15 years 4 months ago
COTraSE: Connection Oriented Traceback in Switched Ethernet
Layer 2 traceback is an important component of end-toend packet traceback. Whilst IP traceback identifies the origin network, L2 traceback extends the process to provide a more ļ...
Marios S. Andreou, Aad P. A. van Moorsel