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» The Packet Switching Brain
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IPPS
2003
IEEE
15 years 3 months ago
A Low Cost Fault Tolerant Packet Routing for Parallel Computers
This work presents a new switching mechanism to tolerate arbitrary faults in interconnection networks with a negligible implementation cost. Although our routing technique can be ...
Valentin Puente, José A. Gregorio, Ram&oacu...
ICMCS
2005
IEEE
113views Multimedia» more  ICMCS 2005»
15 years 3 months ago
Network-Adaptive Frame-Expansion-Based Packet Video Coding for Erasure Channels
This paper proposes a novel error-resilient packet video coding method which is designed to operate on unreliable IP networks suffering from large bursts of packet losses. The mai...
Andrew G. Backhouse, Irene Y. H. Gu
FPGA
2001
ACM
162views FPGA» more  FPGA 2001»
15 years 2 months ago
Reprogrammable network packet processing on the field programmable port extender (FPX)
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extend...
John W. Lockwood, Naji Naufel, Jonathan S. Turner,...
IEEEARES
2008
IEEE
15 years 4 months ago
Design of an FDB based Intra-domain Packet Traceback System
In this paper, we propose an FDB based intra-Domain Traceback System (FDB-DTS), which is a hybrid traceback system composed of packet digesting boxes and an iterative query engine...
Hiroaki Hazeyama, Yoshihide Matsumoto, Youki Kadob...
DFN
2009
14 years 10 months ago
MPLS-TP - The New Technology for Packet Transport Networks
: The Internet Engineering Task Force (IETF) and the Telecommunication Standardization Sector of the International Telecommunication Union (ITU-T) have undertaken a joint effort to...
Dieter Beller, Rolf Sperber